1. Field of the Invention
The present invention relates to a method for forming addresses for the drive selection of a main memory of a program-controlled switching system which encompasses a central controller and a device for expanding the extent of the addresses (expansion device), these switching system components being connected via a data bus or, respectively, a data line group, a control bus or, respectively, a control line group and a status bus, or, respectively, a status line group and at least 2.ltoreq.n.ltoreq.4 of the high-order address lines extend from the central controller to the expansion device. This device comprises address registers whose plurality maximally corresponds to the possible binary code combinations of the connected high-order address lines and the address registers contain at least n+1 memory locations and each memory location of the selected address register has an address line assigned thereto. The at least n+1 high-order address line is present at the output of the expansion device, together with the low-order address lines coming from the central control, form an expanded address line group and are connected to the main memory and the address registers receive the address information from the central controller via the data line group, whereby the address registers are up-dated only when the main memory regions addressed and defined by the central controlled are changed.
2. Description of the Prior Art
Given the method known from the publication TTL-Databook, Vol. 1, 1981, pp. 7-622, an expansion device is employed which expands an address line group coming from a microprocessor by a maximum of eight address lines. To this end, a maximum of four of the high-order address lines of the microprocessor are not directly connected to the main memory but are connected to the expansion device. High-order address lines are represented by those address lines which represent the most significant binary values within the overall address line group. The binary code combinations contained in the maximum of four-high order address lines respectively determine a register in the expansion device. Given a maximum expansion to the greatest possible address line group, one address line is assigned to each of the twelve memory locations of the identified address register. The current address register connection are communicated through the expansion device from the central controller via the data lines before the following main memory access. A renewed communication of the address register information before the following main memory access is only necessary when the central controller addresses a different main memory region which was not represented by the preceding address register information. The low-order address lines coming directly from the central controller, together with the address lines brought in from the expansion device, form an expanded address line group. As a result of the expanded address line group, the main memory assigned to the central controller can then be enlarged.
In this method, the expansion device is co-involved in each main memory access of the central controller, i.e. the initially-described processing steps sequence at each main memory access. This means an increase memory access time due to the processing times within the expansion device, even when the high-order, expanded portion of the address line information and, therefore, the addressed memory area, remain the same.